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Jump Trading
,
Bristol, Bristol
Senior Physical Design Engineer, Bristol
Overview
Job Description
Imagine a world where you are at the forefront of engineer-led innovation without layers of product planning, marketing, and sales to get between you and success. We talk directly to world class traders within Jump as our customers, so there is a direct, trusted relationship that allows efficient communication. We are a well-funded, privately owned company with a silicon design team focused on developing world-class trading platforms. The technology that we architect and deliver is all used internally to solve problems to give us the edge in the quantitative trading industry. We operate in a globally competitive landscape where performance counts. The exciting mix of low latency and high throughput coupled with machine learning systems allows traders to be highly productive in ways that do not exist commercially. Our small and talented team is responsible for the entire process from architecture and specification, through to design, test and bringing up of a final product on a board in production. We have achieved excellent results to date by hiring the best and focusing. We have seen proven success in a shorter time scale than is typical at larger tech firms. Enjoy the satisfaction that comes with seeing your work actively trading in one of the most technologically advanced fields anywhere. Finance experience is not essential as we will give you the opportunity to learn everything you need. What we are looking for are talented, flexible engineers to join our growing team in Bristol. We are looking for an experienced physical design engineer with direct experience of multiple tape-outs of large and complex ASIC/SoC designs in low geometry process nodes. They should have a passion around improving the way we solve complex problems through the work of the team as well as their own direct contributions. Work experience should cover all aspects of the physical design implementation and sign off processes. They should have very strong software development skills with an appreciation of how crucial design automation is in providing a scalable and rigorous approach to the implementation and sign off of complex physical design projects to demanding schedules. What you'll do: * Work within a small multi-disciplinary hardware design team to perform the physical design of leading-edge ASIC/SoC developments. * Contribute to the continued development of the physical design productivity tooling and workflows. * Stay informed of the latest developments in semiconductor physical design and fabrication. * Provide mentorship to less experienced members of the team. * Continue to build your skills in physical design and the automation of physical design processes. * Interpret high level requirements to create exceptional solutions for the trading community. Skills you'll need: * Passion for development, strong work ethic and drive to continually learn and improve. * Sound understanding of technology trade-offs, and a pragmatic approach to problem solving. * Experience in the following: * Direct involvement in multiple tape-outs at advanced process nodes - 16nm and below. * High speed interface physical implementation and sign off - including DDR3/4 and/or HMB1/2. * High speed (multi-GHz) physical design implementation and signoff. * Experience of advanced clocking techniques for high speed designs. * Physical design flow development and automation - intra and inter EDA tool levels. * The use of leading-edge industry standard physical design implementation and sign off techniques and EDA tools. * Strong software development skills - TCL, Python, C/C++. * A strong understanding of STA and advanced timing signoff models/concepts. * A strong understanding of semiconductor physics and the impact of process, voltage and temperature on circuit behaviour. * A sound knowledge of formal verification processes and techniques. * Able to work collaboratively with the wider ASIC design team to facilitate rapid project convergence and execution. * Degree in Electrical and Electronic Engineering or computer science or related subject. * Minimum of 5 years of physical design experience. Bonus points: * Experience of padring design and implementation, including SSO analysis and ESD checks. * An understanding of modern DFT practices. * Experience of full chip signoff - timing, physical, power. * Full custom design of standard cells and memory macros. * Cell library characterisation. * ASIC package design and implementation, including multi-chip-module and stacked-die packages. * RTL development skills - SystemVerilog, Verilog.